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820 -Wv-

6(R,)

TL494

5(ф

16 7 13

9 10

4 2(-)

Ro R.

1.5k

X 510 3.9k

FIGURE 17.73 The 1000-V insulation test bench


TABLE 17.11 The measured experimental results

Item

Test Conditions

Data

Source effect ratio

Fo = 300V, i? = 5kQ, Fj

varies between 20-24 V

0.001

Load effect ratio

= 300V, Fi = 2AXRl

varies between 5 kQ-1 MQ

0.005

Power efficiency

Fi =24V, Vo = 150V,

= 5 kQ, 0.36

0.95

Power efficiency

Fi=24V, Vo = my,RL

= 5kQ,k 0.88

0.96

Power efficiency

Fi=24V, Vo = 300y,RL

= 5Ш,к^ 0.68

0.95


The intervals are:

. V,{h + h)f V, cos \ .......

Average output voltage v2 and input current are:

FIGURE 17.74 The MIT 42/14-V 3-kW dc/dc converter.



TABLE 17.12 Experimental results for different frequency

Mode

/(kHz)

(A)

lo (A)

4 (A)

Pj (W)

Po (W)

/7 (%)

PD (W/in)

20.5

1 4

77.1

3239

3080

95.1

23.40

1 4

78.3

3287

3080

93.7

23.58

21.5

1 4

81.0

3403

3080

90.5

24.01

В

16.5

1 4

69.9

3080

2935

95.3

22.28

В

1 4

68.3

3080

2871

93.2

22.04

В

17.5

1 4

66.6

3080

2797

90.8

21.77


FIGURE 17.75 The IBM 1.8-V/200-A power supply.

I -fc

The power transfer efficiency is

When we set = 180 V and frequency / = 200-250 kHz, we obtained v2 = 1-8 V, N= 12, Iq = 0-200 A, Volume = 14

(in). The average power-transfer efficiency is 94% and the maximum power density (PD) is 25.7 W/in.

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26. Luo, F. L., DSP-Controlled PWM L-Converter Used for PM DC Motor Drives, Proceedings of the IEEE International Conference SISCTA97, Singapore, 29-30 July 1997, pp. 98-102.

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31. Maksimovic, D. and Cuk, S., A General Approach to Synthesis and Analysis of Quasi-Resonant Converters. IEEE Trans. PE 6: (1) 127-140, Jan. 1991.

32. Maksimovic, D. and Cuk, S., Constant-Frequency Control of Quasi-Resonant Converters. IEEE Trans. PE 6: 91), 141-150, January 1991.

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36. Kazimierczuk, M. K. and Bui, X. Т., Class-E DC-DC Converters with an Inductive Impedance Inverter. IEEE Trans., Power Electronics 4: 124-135, July 1989.

37. Massey, R. R and Snyder, E. C, High Voltage Single-Ended DC-DC Converter. IEEE PESQ 1977 Record, pp. 156-159.

38. Jozwik, J. J. and Kazimerczuk, M. K., Dual Sepic PWM Switching-Mode DC/DC Power Converter. IEEE Trans. Industrial Electronics 36: (1), 64-70, 1989.

39. Martins, D. C, Application of the Zeta Converter in Switch-Mode Power Supplies, Proc. of IEEE APEC93, USA, pp. 214-220.

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41. Wang, J., Dunford, W. G., and Mauch, K., Some Novel Four-Quadrant DC-DC Converters. Proc. IEEE-PESC9S, Fukuoka, Japan, pp. 1775-1782.

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43. Ye, H. and Luo, F. L., Luo-Converters, A Series of New DC-DC Step-Up Conversion Circuits. International Journal < Power Supply Technologies and Applications > 1: (1), April 1998, Xian, China, pp. 30-39.

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54. Tse, C. K., Wong, S. C, and Chow, M. H. L., On lossless switched-capacitor power converters. IEEE Trans. PE 10: (3), 286-291, May 1995.

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Gate Drive Circuits

M. Syed J. Asghar, Ph.D.

Department of Electrical Engineering

Aligarh Muslim University Aligarh, India

18.1 18.2 18.3 18.4

18.5

18.6

Introduction...................................................................................... 407

Thyristor Gate Requirements................................................................ 407

Trigger Circuits for Thyristors.............................................................. 409

Simple Gate Trigger Circuits for Thyristors............................................. 410

18.4.1 Resistance Trigger Circuits 18.4.2 RC Trigger Circuits 18.4.3 Diac Trigger Circuit 18.4.4 AC-Thyratron Type Trigger Circuit 18.4.5 Unijunction Transistor-Based Trigger Circuit 18.4.6 Advanced Triggering Circuits for Thyristors 18.4.7 Buffer and Driver Circuits for Thyristors

Drivers for Gate Communication Switches............................................. 422

18.5.1 Gate Drive Circuits for Power MOSFETs 18.5.2 Design Consideration of MOSFET Driver Circuits 18.5.3 Driver Circuits for IGBT 18.5.4 Transistor-Based Drive Circuits 18.5.5 Gate Drive Circuit for GTO

Some Practical Driver Circuits.............................................................. 427

References.......................................................................................... 429

18.1 Introduction

A gate signal is required for every power semiconductor-controlled device to bring it into the conduction state. Fiowever, the nature of the gate drive requirement (or the base drive requirement for power bipolar junction transistor (BJT) and Darlington power transistor) of each device varies, depending on the voltage and current rating and also on the type of the device (i.e., thyristors or gate-commutation devices). The gate drive requirements of thyristors (sihcon controlled rectifier, SCR), Triac, etc. are different from the gate drive requirements of the gate-commutation devices, viz. gate-turn-off thyristor (GTO), power BJT, metal-oxide field effect transistor (MOSFET), insulated-gate bipolar transistor (IGBT), static induction transistor (SIT), MOS-controUed thyristor (MCT), and so forth. Therefore, gate drive circuits of thyristors and gate-commutation devices are discussed here separately.

18.2 Thyristor Gate Requirements

A thyristor can be triggered by the apphcation of a positive gate voltage {Vq) and hence a gate current {Iq) supplied from a gate drive circuit as shown in Fig. 18.1. Fiowever, the choice of Vq and Iq is not restricted to a particular value, rather it varies over a wide range. It depends on the gate characteristics of the device as shown in Fig. 18.2. Any operating point {Vq, Iq) may be selected within the permissible or preferred gate

drive area bounded by curves 1, 2, 3, 4, 5, and the rectangle mnop. Curve 3 represents a constant value of the maximum permissible gate power dissipation Р^м- Moreover, there is a nontrigger gate voltage {Vqj)), which is a minimum gate voltage below which a thyristor cannot be triggered at any temperature (normally up to 100 °C). This gives a permissible noise level of the gate drive circuit that will not trigger the thyristor. The rectangle mnop is prescribed by the manufacturers to avoid both unsuccessful and undesirable triggering in the worst cases. It corresponds to the threshold condition of triggering {Vqj, Iqt)- Also, it is related to forward anode voltage {Vjj) and junction temperature {Ту). For lower temperature, Vqj and Iqj increase and therefore the size of the rectangle mnop increases. Similarly, it should be ensured that the gate-circuit load-line {wxyz) should pass above this area. Fiowever, the most preferred zone for the operating point is close to curve 3. This, in turn, increases the di/dt capability, minimizes the switching-on time, and hence reduces the switching loss of the thyristor.

Gate trigger circuits can be designed with the help of both Figs. 18.1 and 18.2. Curve 6 shows the gate-to-cathode forward v-i characteristics of the device at given V and T. This is the same as the forward-conducting characteristics of a silicon diode. The load-line wxyz of the gate trigger circuit intersects the device characteristics at q. Thus operating gate voltage {Vq) and gate current {Iq) are given by or and os respectively. The permissible range of the operating point is between x and y. The maximum or short-circuit current of the trigger source is Е^/{Щ-\- Р^), which is shown by ow;




Also,

A Г


Л/Vv-


n er source

figure 18.1 A typical switching arrangement for an SCR.


figure 18.2 Typical gate characteristics of an SCR.

should be selected such that this current is not harmful to the source as weU as to the gate-to-cathode junction (/3). Similarly, oz shows the maximum trigger source voltage Eg. The presence of R2 is optional, however, if Eg is greater than VM it helps to clip Vq not to exceed the У^м ll otherwise /3 may be damaged. Moreover, R2 provides a low gate-to-cathode impedance in the off-state of the device, thus improving the thyristor noise immunity.

When R2 is connected across G and К terminals, the maximum Vq should be less than Vqj. Thus

Re + R1+R2

Es<V,

(18.1)

E, = Vq + (R, + RMIq +

(18.2)

The preceding design considerations are in terms of continuous or dc values of gate voltage and gate current. However, a single pulse or a train of pulses are also used to trigger a thyristor. The forementioned design considerations (with dc values of Vq and Iq) are also vahd for a pulsewidth up to 100 is. For a short pulsewidth, Vq (peak) and Iq (peak) should be increased. In the case of a single pulse, the width of the gate pulse should be wide enough such that anode current would reach the latching current level of the thyristor. This consideration is important for a highly inductive load, where due to inductance the rise time of anode current is significant. For a train of pulses, it is found in practice that a 50-is pulsewidth at 10 kHz with 50% duty cycle is sufficient for switching a highly inductive load. However, the average value of the peak gate drive power Pq (peak) should be less than Pqj (dc value), which is given by

Pqm Rq (peak) x duty ratio = Pq (peak) x pulsewidth

x frequency of pulses (18.3)

Similarly, there is a permissible hmit to the maximum negative gate voltage that may appear across the gate-to-cathode junction. This is exactly like the peak inverse voltage (PIV) rating of an ordinary p-n junction diode. For this purpose either a diode is connected in series with a gate (between R and G), or a diode (or a Zener diode) is connected across R2 where the cathode of the diode is connected to G. The Zener diode clips the positive overshoot of the gate voltage above the Vq level.

Example 18.1. Design a suitable gate trigger circuit for an 800-V, 110-A SCR (OE-C50N), connected with a 6-V dc power supply. The maximum permissible current and the short-circuit current of the dc source are 200 and 500 mA, respectively. The SCR has the following gate parameters: Vq = 2.5 V; Iq = 50 mA; Vm = 3 V; I = 100 mA; and Pqm = 0.5 W.

Solution, (i) For the gate drive circuit shown in Fig. 18.1 (without R2). Short-circuit current Igh = 500 mA. Therefore,

To protect the source from excessive current, the minimum value of resistor R is given by

Rc + R, > = - = 30 Q - 0.2 0.2



18 Gate Drive Circuits that is,

ii > 30 - 12 = 18 Q

Also, to protect the gate-to-cathode junction of the SCR, the minimum value of the resistor is given by

that is.

ii > 60 - 12 = 48 Q

Therefore, Ri should be greater than 48 Q.

Now corresponding to the typical gate characteristics, that is, Vq = 2.5 V and Iq = 50 mA, the maximum value of resistor Rl is given by

Rs + Ri<

E, - Vr.

~ In 0.05

Thus, Rl should be selected within 58 and 48 Q. Depending on the availability of resistors of different values on the market, we may choose Ri = 56 Q.

Solution, (ii) Resistor R2 is also incorporated (Fig. 18.1). As Vq should not exceed the Vqj level, therefore.

Rs + ii +

-Es<Vq

R2 < (Rs + 1 + 2) = 7(12 + 56 + R2) = 69 Q ts 6

Therefore, we choose R2 = 68 Q.


a cot

FIGURE 18.3 Different types of trigger signals for switching a thyristor.

the supply voltage. The ideal switching signal for a thyristor should have an adequate amplitude of current for sufficient duration with a short rise time as shown in Fig. 18.4. The initial high magnitude and rapid rise of the gate current quickly turn on the device completely. Thus, carriers spread rapidly throughout the surface of blocking junction (/2). This decreases switching losses and increases the initial di/dt capability of the device. After a few microseconds, a small gate current (slightly higher than the minimum value required for triggering Iqj) can be maintained. Ordinarily, a continuous gate signal is not required, but inductive circuits necessitate a sustained gate signal initially, until successful triggering takes place. For reliable operation of controllers, gate trigger signals are normally supphed during the entire on period (e.g., converters of dc drive). Fiowever, for a resistive load, a single sharp rising pulse is sufficient for triggering. For high-power applications, it is a common practice to isolate the control and triggering circuits from the power circuit (consisting of

-> I

18.3 Trigger Circuits for Thyristors

Normally, thyristors are switched on by the apphcation of a voltage signal at the gate terminal of the device as shown in Fig. 18.1. The gate voltage (vq) is generated with the help of a gate drive circuit, which is called a firing or triggering circuit. Thus, thyristors can be switched on by a slow-rising rectified ac signal, a sharp single pulse, a constant-magnitude dc signal, or a train of high-frequency pulses as shown in Fig. 18.3. The thyristor switches on as soon as Vq exceeds the critical gate trigger voltage (Vqj) level. This depends on the gate-to-cathode junction temperature (Tj), anode current (i), and FIGURE 18.4 An ideal gate current required for a thyristor.

- ILLS

5 lus



thyristors). Otherwise, the effects of high voltage and high current transients may cause misoperation or damage to the low-power control and trigger circuits. For this purpose, pulse transformers or optocouplers are used for low- and medium-power semiconductor devices. For higher power applications, for example, HVDC transmission systems, fiber-optic cables are used to isolate the control circuit from the power circuit. A 5-mW light trigger power source was found sufficient for switching a light-activated silicon-controUed rectifier (LASCR) with a rating of 4 kV, 3 kA.

In general, a thyristor conducts when it is properly biased and the trigger source of a trigger circuit supplies the required the minimum gate voltage (Vgt) Bte current (Iqt)-

18.4.1 Resistance Trigger Circuits

A step dc voltage, a slow rising dc signal, or a rectified positive half-wave signal can be used to trigger thyristors. When the voltage applied to the gate terminal exceeds the Vt level, triggering takes place. Figure 18.5 shows a trigger circuit and waveforms for an ac circuit. Before conduction of the SCR, the input supply voltage (v) appears across the SCR.

Neglecting R2 and the voltage drop across D, the gate voltage is given by

Vr=-

Rl + RqK + mii

(18.4)

18.4 Simple Gate Trigger Circuits for Thyristors

Simple trigger circuits can be realized by R or RC network. They are cheap and consume little power. However, the control and hence the load output voltage (v), are susceptible to the device temperature variations. Moreover, feedback control cannot easily be incorporated.

where v = sin cot denotes the supply voltage, and Rq is forward gate-to-cathode resistance.

As soon as Vq reaches the Vt ll supplies the required gate current, conduction of SCR takes place. The voltage Vjj coUapses and therefore Vq also reduces to almost zero level, and v appears across the load. Now, R can be increased to reduce Vj and thus to increase a. However, with a larger Rl, eventually the circuit fails to trigger the device as shown by curve 3. Here, the control of a is restricted to 90° only (curve 2 of Vq in Fig. 18.5). Similarly, Iq should not


FIGURE 18.5 Resistance trigger circuit for an SCR.



exceed the Iqj level. Therefore, the minimum value of the resistor R is given by

Rryl

<Igm

(18.5)

This circuit is further improved by adding a resistor R2 across G and К terminals of the SCR. Then the worst-case voltage across R2 should not exceed the Vq level. Therefore, the maximum value of the resistor R2 is given by

Rmin + 2

Vrn < Усы

(18.6)

The same circuit also is applicable for Triac. However, diode Dl has to be removed such that a trigger signal will be available at the gate terminal during both half-cycles. Because the gate of a Triac is not equally sensitive in all four of its modes of switching, a and hence are usually different in the positive and negative half-cycles of the supply voltage.

18.4.2 RC Trigger Circuits

A phase-shifted signal in an ac circuit and a slow rising signal in a dc circuit generated by an RC network are used to trigger the thyristors. In these cases the range of a is extendable beyond 90°.

18.4.2.1 AC-Type

Figure 18.6 shows a trigger circuit and related vector diagram. The supply voltage appears across the RC branch. Neglecting the discharge of the capacitor during the conduction period of the thyristor, the circuit can be analyzed by the sinusoidal steady-state response of a linear RC circuit. Thus, the phase angle of the capacitor voltage (0), can be controlled from 0° to

-МЛг

с


-\N\r



FIGURE 18.6 A typical RC trigger circuit.

almost 90° (Fig. 18.6). Fiowever, the rms value of the capacitor voltage {Vq), which is equal to {VcosO), decreases drastically for a higher value of в. By variation of R, the phase angle {в) as well as the magnitude of Vq change. The power-factor angle ((/)) of the RC circuit is given by

Ф = t-\XJR) = t-\l/(DCR) (18.7)

Also, from trigonometry, when в = (n/2) - ф,

Ыпв = (1/гшф) and в = tan-\(DCR) (18.8)

The instantaneous value of the voltage across capacitor (vq) is given by

Vq = 4iVq sin(a;t - 0) = (a/2 У cos d) sin(a;t - d) (18.9)

During the positive half-cycle when Vq hence Vq exceeds the Vq level, conduction of the thyristor takes place (Fig 18.6). In fact Vq is the rectified capacitor voltage. Thus, a can be controlled over wide range beyond 90°. By variation of R, phase angle [Q) as well as the magnitude of Vq change as shown in Fig. 18.6. Furthermore, the magnitude of Vq can also be controlled by gate current hmiting resistance R2, as in the case of a resistance-trigger circuit.

An improvement in the circuit configuration is possible when the RC branch is connected across the SCR. When the SCR conducts, voltage across the RC branch also reduces to a very low level (ideally zero). The power dissipation in the gate circuit therefore reduces significantly.

example 18.2. A 240-V, 50-Fiz supply is connected to an RC trigger circuit (Fig. 18.6). If is variable from 1 to 22 kQ, Vq = 2 V and С = 0.47 iF, what are the minimum and maximum triggering or switching angle (a)?

Solution. The phase angle of Vq is given by

в = tan (coCi) = tan-\2nfC)

= tan (2 x 50 x 0.47 x 10 x R)

Furthermore,

Vq = У cos 0 and vcot) = V2Vq sin(cot - в).

(i) When R = IkQ, it gives в = 8.4°, cosO = 0.989 and Vq = 240 x 0.989 = 237.4 V. Therefore,

v,((Dt) = V2VQsm((Dt - 8.4°) = 335.77 sin(a;t - 8.4°)

Conduction of SCR takes place at = Vqj = 2 V and (Dt = d. Therefore,

vX) = 2 = 335.77 sin(a;t - 8.4°)



The minimum value of a is given by

ai, = 8.4° + sin-42/335.77) = 8.7°

(ii) When i = 22kQ, it gives 0 = 72.9°, cos в = 0.296 and Vq = 240 x 0.296 = 70.97 V. Because

vot) = 2 = V2 x 70.97 sin(a;t - 72.8°) = 100.36sin(a;t-72.8°)

the maximum value of a is given by

a = 72.8° + sin 42/100.36) = 73.9°

of the SCR takes place. Simply by controUing R, the charging rate of the capacitor a varies; prevents a large negative supply voltage from appearing at the gate terminal of the thyristor. For a wide range of a, charging of the capacitor is required for almost a three-fourths time-period (T) of the supply voltage. However, for 50 or 60 Hz mains supply apphcations, the foUowing empirical equation had been reported:

RC>0.65T = 4/a;

(18.10)

where the angular frequency of ac mains со = In/T.

The value of R2 Vqj are supplied to the gate terminal:

is chosen such that the required Iqj and

18.4.2.2 Half-Wave Type

This circuit has been realized by incorporating an additional diode (d2) in the circuit shown in Fig. 18.6. As iUustrated in Fig. 18.7, the capacitor is charged (upper plate negative) by v through D2. The charging starts from the negative-zero-crossover instant to the negative peak of v, that is, - a/2 V. Then the voltage at the anode of D2 (i.e. v) becomes equal to the voltage at the cathode (i.e. v), therefore the current through D2 ceases and D2 becomes reverse-biased. Now the charging of the capacitor (with upper plate positive) takes place through R and the charging rate depends on the time-period RC. When Vq (rectified Vq) becomes shghtly higher than Vqj, conduction

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FIGURE 18.7 Another RC trigger circuit.

R2<

V-Vqt Vj)

(18.11)

where v is the voltage at the switching instant of thyristor and is forward voltage drop of diode . Also, the maximum value of R2 is given by

2max -

V2V-Vgt-di V2V

(18.12)

With an approximation, the previous analysis of the trigger circuit holds good even for this case.

18.4.2.3 Full-Wave Type

This circuit has been realized by incorporating a diode bridge in the previous circuit (Fig. 18.6). As illustrated in Fig. 18.8, charging of capacitor takes place through R and the charging rate depends on RC (time period). When Vq (rectified Vq) becomes shghtly higher than Vqj, conduction of SCR takes place. Simply by controUing R, the charging rate of the capacitor a varies.

In this circuit, charging of the capacitor starts from each zero-crossover instant and the capacitor experiences only a half-wave rectified voltage until the thyristor is triggered. The circuit can be analyzed by the complete response of an RC circuit with a sinusoidal (half-wave) excitation. The voltage expression is given by

v{t) = sin cot = Ri{t) + (1/C)

Kt)dt

where

differentiating.

o< t>- = -

2 CO

(DVCOS(Dt = R--

(18.13)

С

(18.14)




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